PARALLEL SESSION
A4L-G
Advanced Memory Devices
TUESDAY - 9 September | 13:50 - 15:55
CHAIRS
Klaus Knobloch, Guilhem Larrieu
SESSION PROGRAM
13:50 - 14:15
A Novel Embedded 1T-1R SOT-MRAM Macro Achieving 32% Area Reduction Compared with the Traditional 2T-1R Sot Cell
Weiliang Huang, Jinhao Li, Yimo Du, Hongchao Zhang, Chengyuan Sun, Hongxi Liu, Hui Jin, Xuan Li, Gefei Wang, Kaihua C...
14:15 - 14:40
Sb/Te Ratio Engineering in Phase-Change Memory for High SET Speed and Large Memory Window
Renzo Antonelli, Oumaima Daoudi, Guillaume Bourgeois, Antoine Salvi, Sylvain Gout, Mathieu Bernard, Leïla Fellouh, Je...
14:40 - 15:05
A 40nm 48.7F²/Bit 1T2R Resistive Memory Bitcell Array for Adaptive Vector-Symbolic In-Memory Computing
Wenshuo Yue, Zhaokun Jing, Lintao Ye, Tianyao Xiao, Pek Jun Tiw, Yihan Fu, Yuxiang Yang, Mo Guang, Kaiwen Long, Daiji...
15:05 - 15:30
Reconfigurable and Ultrafast Non-Volatile Floating-Gate Memory Based on Van der Waals Heterostructures
Minh Chien Nguyen, Ngoc Thanh Duong, Hong Woon Yun, Van Dam Do, Van Tu Vu, Whan Kyun Kim, Vu Khac Dat, Huamin Li, Woo...
15:30 - 15:55
New Perspective on Chiplet ESD and Dielectric Breakdown for Optimizing Protection Circuit in 2.5D/3D Bonding Technology
Shih-Hsiang Lin, Marko Simicic, Mihael Krilcic, Nicolas Pantano, Wen-Chieh Chen, Geert Van der Plas, Eric Beyne, Piet...