WORKSHOPS
W6 (Dissemination workshop): Shaping the Future Through Innovations in RF & Mm-Wave Design and Technology
9:30 - 13:00 ROOM R6
CHAIRS
Erkan Isa (Fraunhofer, DE)
Dominique Morche (CEA-Leti, FR)
Björn Debaillie (imec, BE)
ABSTRACT
Jointly organized by Fraunhofer, CEA and IMEC, and driven by major industrial partners, the workshop focuses on RF and mm-wave sensing and communication technologies, dedicated to selected project outcomes of Chips JU European Projects SOIL, BEYOND5 and Move2THz. The workshop focuses on presenting recent advances in FDSOI technologies, circuit design and extension of capabilities towards THz range with InP.
PROGRAM
​09:30 - 9:35
Opening
Erkan Isa (Fraunhofer, DE), Dominique Morche (CEA-Leti, FR), Björn Debaillie (imec, BE)
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9:35 - 9:55
Powering the Future of Connectivity: Technology Innovations for 5G Advanced & 6G
Yvan Morandini (Soitec, FR)
The emergence of 5G Advanced and the rapid progression toward 6G wireless technologies are radically transforming RF front-end module (FEM) design and integration, ushering in unprecedented disruption and innovation. Successfully navigating this profound technological shift—which encompasses the newly allocated sub-20GHz spectrum (FR3) and extensive utilization of millimeter-wave (mmWave) frequencies (FR2)—demands revolutionary advancements in RF substrate technologies. These substrates must be meticulously engineered to meet the exceptional performance standards required by next-generation 5G Advanced and 6G RF front-end modules. Overcoming these disruptive challenges requires groundbreaking semiconductor technologies that significantly enhance signal integrity, maximize power efficiency, and revolutionize system-level integration. This paper presents a detailed roadmap of transformative RF substrate technologies essential to developing robust, high-performance RF front-end systems. These innovations will constitute the foundational elements for next-generation 5G Advanced and 6G wireless infrastructures. We highlight cutting-edge engineered substrates that directly address the complex and rapidly evolving design challenges of future wireless communication systems, underscoring their critical role in facilitating unprecedented leaps in RF technology performance.​
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9:55 - 10:15
What Happened to mm-Wave? - A Cellular Perspective
Fredrik Tillman (Ericsson, SE)
As one of the most hyped features of 5G, mm-Wave was on a quest to offset the user experience from the installed LTE base. It has now been 7 years since the first commercial roll-out of mm-Wave radio products, and yet the market remains minuscule for mobile networks with an uncertain deployment forecast. What happened, and how can the situation change ahead? ​
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10:15 - 10:35
Advancing CMOS-SOI Technologies for mm-Wave and RF Applications: A Bottom-Up Approach to Integrated Circuit Design and System Innovation
Baudouin Martineau (CEA-Leti, FR)
CMOS technology has long been a key enabler in analog and mm-wave circuit design, meeting market demands for cost-effectiveness and high-volume production. However, with the rise of High performance SiGe and low cost FinFET alternatives, the question remains—does CMOS(SOI) still have a competitive edge in performance and efficiency? This workshop will explore the potential of CMOS FD-SOI technologies beyond low-power applications, demonstrating how strategic design approaches can unlock high-power RF capabilities. Through a bottom-up perspective on integrated circuit design and system innovation, we will highlight the opportunities and challenges of advancing CMOS-SOI technologies for next-generation mm-wave and RF applications.​
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10:35 - 11:00
III-V HBTs on Si substrate: A CMOS compatible technology for advanced communication systems
Abhitosh Vais (imec, BE)
III-V semiconductor-based devices, in particular InP Heterojunction Bipolar Transistors (HBTs), are a strong contender for next generation high speed communication systems. In this paper, we present motivation for the upscaling of III-V technology on to 300mm Si platforms. A comparison of various options for such III-V on Si technology would be described. The challenges in the way to achieve its integration into existing CMOS platform and possibilities to overcome them would be shown. We would describe IMEC’s path to demonstrate a CMOS compatible III-on-300mm Si technology with most recent results.​
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​11:00 - 11:30
Coffee break​
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11:30 - 11:50
Mm-Wave IC Design for Radar Applications
Frank Henkel (IMST, DE)
The talk will give an overview about current mm-wave radar application fields and its implementation on the integrated circuit side with particular focus on CMOS technologies. Parts of the presented results have developed within the European research project Innostar. Hence, highlights of this project will be presented as well as results of a 80 GHz mm-wave TRX frontend implementation based on 22nm FD-SOI will be given.​​
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11:50 - 12:10
120GHz MIMO radar chip with antennas in package for sensing applications
Arndt Ott​ (Sony, DE)
Radar is already a widely deployed long-range sensing solution for safety and convenience features in vehicles leveraging frequencies between 76GHz to 81GHz. As vehicle OEMs look to improve and extend sensing resolution, radar gained importance also for in-cabin Driver and Occupant Monitoring Systems (DMS/OMS). Leveraging higher frequencies from 116 GHz to 123 GHz enables vital sign detection, including heartbeat and respiration, to ensure driver and occupant safety. These higher, license-free frequencies also support the use of antenna-in-package techniques that significantly simplify PCB design, minimize sensor form factor and reduce cost - criteria particularly important for DMS/OMS applications. A highly integrated 4x4 MIMO TRX with antenna in package for in-cabin applications will be presented. The chip was developed within EU funded project Beyond 5. The MMIC operates in the frequency band from 116GHz to 123GHz and was developed in 22FDX technology of Global Foundries. The chip employs a novel package with integrated antennas. Glass is utilized as a packaging material supporting dense interconnects and excellent antenna performance.
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12:10 - 12:30
D-Band Device Characterization using On-Wafer Calibration and Block Design for Next Generation Radar Applications in 22nm FDSOI​
Thomas Kämpfe (Fraunhofer, DE)
This talk focuses on advancements in D-band device characterization using on-wafer calibration and block design for next-generation radar applications in 22nm FDSOI technology. We will discuss crucial calibration and de-embedding techniques for on-wafer characterization up to 170 GHz, followed by innovative design strategies for a compact transformer-based power amplifier and a low noise amplifier that achieves a sub-6 dB noise figure and 19 dB gain at 120 GHz. The presentation aims to highlight the integration of advanced calibration methods and circuit design for efficient D-band components in radar systems.
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12:30 - 13:00
Designing RF/mm-Wave Power Amplifiers in Silicon for Large Scaled Phased Arrays
Hua Wang (ETHZ, CH)
Large-scale RF/mm-Wave phased arrays have become ubiquitous in a wide variety of wireless communication and sensing applications, such as SATCOM, base stations, radars, and relays. Many these array-based systems promise performance features, such as high element counts, high element density, moderate thermal density, and deployment capability in mobile or energy-/cost-constrained platforms. In particular, these high-density large-scale phased arrays often exhibit significant electromagnetic and thermal couplings between their antenna elements. Consequently, the frontend circuits and beamformer chips in these arrays now face multiple new challenges that do not exist in traditional single transmitter-receiver radios. As an example, power amplifiers, a key frontend building block in any phased arrays, are expected to achieve smaller form factor, higher energy efficiency, and antenna load VSWR resilience to meet the needs of these high-density large-scale phased arrays. In this workshop talk, I will present several recently published RF/mm-Wave power amplifier designs from ETH IDEAS group that are specifically tailored to enable large-scale phased arrays implementations.
BIOSKETCHES
Erkan Isa (Chair)
Erkan Isa is with Fraunhofer EMFT since April’13, founding the IC Design group at this center. He holds PhD’12 in Microelectronics from EPFL, MS’06 in Microelectronics from TU Hamburg-Harburg, BS’05 in Computer Engineering from Istanbul Technical University (ITU), and BS’03 in Electronics and Comm. Eng. from ITU. From 2007 to 2010 he was with CEA-LETI, Grenoble, France, working on the design and optimization of A/D converters in deep sub-micron technologies. Between 2010 and 2013 he worked for Fujitsu Semiconductor Europe GmbH in Munich as an analog and mixed-signal design engineer, contributing to the key mixed-signal IPs for automotive SoC products. Dr. Isa serves as Group Manager and have been coordinating collaborative programs for Fraunhofer, e.g. SERENE-IoT, WAYTOGO FAST, REFERENCE, OCEAN12, BEYOND5, MoBjörn Debaillie (Senior, IEEE) leads imec’s collaborative R&D program on cutting-edge connected computing, covering high speed communications, high resolution sensing, and neuromorphic computing. As a seasoned researcher and manager, he is responsible for strategic collaborations and partnerships, innovation management, and public funding policies as well as the operational management and coordination across imec’s collaborative programs and projects. Björn Debaillie coordinates public funded projects and seeds new initiatives. He holds patents, received awards and authored books and international papers published in various journals and conference proceedings.ve2THz, SOIL. Dr. Isa had served as Technical Program Chair and General Co-Chair for IEEE NEWCAS 2018 and NEWCAS 2019, respectively.​
Dominique Morche (Chair)​
​Dominique Morche received the M.Sc. degree in engineering from the Ecole Nationale Supérieure d’Electricité et de Radioelectricité de Bordeaux, Bordeaux, France, in 1990, and the Ph.D. degree in electronics from the Institut National Polytechnique de Grenoble, Grenoble, France, in 1994. His Ph.D. mainly focuses on sigma–delta Analog-to-Digital Converter (ADC). From 1994 to 2001, he was with France Telecom, Meylan, France, as a Research Engineer. He has been involved in the architecture and design of analog circuits for telecom applications. He is currently with the Commissariat à l’énergie Atomique-Leti Minatec, Grenoble, where he is a Research Director. His current field of research is in the specification and design of RF architecture for UWB, mm-wave, and the IoT systems.
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Björn Debaillie (Chair)
Björn Debaillie (Senior, IEEE) leads imec’s collaborative R&D program on cutting-edge connected computing, covering high speed communications, high resolution sensing, and neuromorphic computing. As a seasoned researcher and manager, he is responsible for strategic collaborations and partnerships, innovation management, and public funding policies as well as the operational management and coordination across imec’s collaborative programs and projects. Björn Debaillie coordinates public funded projects and seeds new initiatives. He holds patents, received awards and authored books and international papers published in various journals and conference proceedings.
Frank Henkel
Frank Henkel received a Diplom-Ingenieur Degree in 1996 from the University of Kassel, Germany, in Electrical Engineering. In 1998 he received a Master Degree in Physics from the University of Reading, UK. Mr. Henkel started his career at Texas Instruments before he moved to IMST GmbH in Germany where he worked as a research engineer. Currently, Mr. Henkel is leading the Chip Design Center at IMST GmbH. Actually, he holds the position of vice-president (Prokurist). He has been involved in a number of activities at IEEE and German VDE/ ITG conferences.
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Thomas Kämpfe
Thomas Kämpfe is professor for Neuromorphic Computing at TU Braunschweig as well as department manager for Components & Systems at the Center Nanoelectronic Technologies at Fraunhofer IPMS. He earned his habilitation in Electrical Engineering in 2022 and his Ph.D. in Physics in 2016, both from TU Dresden. Following research scholar positions at the University of Colorado at Boulder and Stanford University, he joined the Fraunhofer Society in 2017. Dr. Kämpfe has authored over 250 peer-reviewed articles in prestigious journals and conferences such as Nature Communications, ACS Nano, IEDM, VLSI, DAC, ESSCIRC, and DATE. One focus of his work is on RF device characterization & modelling towards MMIC design. In recognition of his contributions, he was awarded the George-E-Smith Award in 2023, the Dresden Excellence Award in 2023, four HiPEAC paper awards, the Excellent Paper Award at RFIT 2022, and received a Best Paper Nominations in DATE 2021 and 2023. Dr. Kämpfe has actively contributed to various international conferences, serving as the technical program committees for events like IEDM, DAC, DRC, EDTM, ICCAD, DATE, ASP-DAC in the field of in-memory computing and NVRAM.
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Baudouin Martineau
Baudouin Martineau received his Ph.D. degree in microwave and microtechnology from the University of Lille, France, in 2008. The same year, he joined the Technology R&D department of STMicroelectronics, Crolles, France, as millimeter wave and RF design engineer. Since 2014, he is senior expert in RF & mmW design at CEA LETI research Institute and since 2023 the head of RF Architecture & IC Design Laboratory. Dr. Martineau has authored and co-authored more than 50 IEEE publications and more than 25 patents.
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Yvan Morandini
Yvan Morandini received his Engineering degree specializing in electronics and radio frequencies from PHELMA, France, in 2005 and his Ph.D. from Lille University in 2008. Following three years at STMicroelectronics, he pursued his career at IBM, Dolphin Integration, and currently SOITEC, where he holds the position of Senior Strategic Marketing Manager. Dr. Morandini has accumulated over 20 years of extensive experience in the semiconductor industry, with expertise spanning characterization, modeling, and design. He has authored and co-authored over 20 publications in international peer-reviewed journals and conferences and is a Member of the Institute of Electrical and Electronics Engineers (IEEE).
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Arndt Ott
Arndt Ott received his Ph.D. degree in electrical engineering from the Technische Universität München, Munich, Germany, in 2013. The same year he joined the European Technology Center of Sony as a millimeter wave and RF research engineer. Currently, he is a principal engineer at Sony Semiconductor Solutions with main research focus on sub-THz radar systems and packaging solutions.
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Fredrik Tillman
Fredrik Tillman received his M.Sc. and Ph.D. degrees in Electrical Engineering from Lund University in 2000 and 2005 respectively. After graduation he joined Ericsson Mobile Platforms and participated in the first cellular modem CMOS radio development in Sweden and US before moving on to the research branch of the company. Today he is heading a department at Ericsson Research with focus on integrated radio circuit design for both cellular infrastructure and device connectivity. Besides being responsible for internal R&D activities, Fredrik is active in the European research community and has been the Ericsson driver for multiple collaboration projects within the Horizon framework. Fredrik is serving as a board member of the Swedish strategic innovation program Smarter Electronic Systems and since 2025 chairman of the Swedish competence centre Advanced Chip Technologies.
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Abhitosh Vais
Abhitosh Vais received the PhD degree in Electrical Engineering from KU Leuven, Belgium in 2016. Currently, he is working at IMEC Belgium on the III-V device technology for 6G and beyond.
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Hua Wang
Hua Wang is a Full Professor and the Chair of Electronics at Department of Information Technology and Electrical Engineering (D-ITET) of Swiss Federal Institute of Technology Zürich (ETH Zürich). He is the Institute Deputy Head of the Integrated Systems Laboratory (IIS) at ETH Zürich. He is the Director of the ETH Integrated Devices, Electronics, And Systems (IDEAS) Group. Prior to that, he was a Tenured Associate Professor at the School of Electrical and Computer Engineering (ECE) and held the Demetrius T. Paris professorship at Georgia Institute of Technology, USA. He worked at Intel Corporation and Skyworks Solutions from 2010 to 2011. He received his M.S. and Ph.D. degrees in electrical engineering from the California Institute of Technology, Pasadena, in 2007 and 2009, respectively. Dr. Wang is interested in innovating analog, mixed-signal, RF, and mm-Wave integrated circuits and systems for wireless communication, sensing, and bioelectronics applications. He has authored or co-authored over 250 peer-reviewed journal and conference papers with an H-index of 52. Dr. Wang is an IEEE Fellow and a Top Contributing Author to the IEEE International Solid-State Circuits Conference (ISSCC) of the past 70 years 1954-2023. He received the DARPA Director’s Fellowship Award in 2020 (the first awardee in Georgia Tech’s history), the DARPA Young Faculty Award in 2018, the National Science Foundation CAREER Award in 2015, the Qualcomm Faculty Award in 2020 and 2021, and the IEEE MTT-S Outstanding Young Engineer Award in 2017.