TUTORIALS
T5: Beyond 3nm: Pioneering CMOS Technologies from Individual Transistors to Full Circuits in the Angstrom Age
14:00 - 17:30 ROOM R8
CHAIR
Hussam Amrouch (Technical University of Munich, DE)
ABSTRACT
The semiconductor industry is entering a transformative era as CMOS scaling advances beyond 2nm into the Angstrom regime. This tutorial explores key breakthroughs, including nanosheet and complementary FET (CFET) technologies, and the critical role of material-to-system co-optimization. We will address major reliability challenges such as aging and self-heating, highlighting how deep learning can revolutionize reliability estimation—from individual transistors to full-chip analysis—enabling massive acceleration. Additionally, we will demonstrate how deep neural networks (DNNs) can enhance compact modeling, significantly improving predictive accuracy and efficiency. Attendees will gain insights into the future of transistor scaling and AI-driven reliability modeling.
PROGRAM
14:00 - 15:30
Reliability Challenges in Sub-3nm Technologies: Material Implications and Device Impact
Luca Larcher (Applied Materials and University of Modena and Reggio Emilia, IT)​
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15:30 - 16:00
Coffee break
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16:00 - 17:30
Journey with Reliability Estimation from Individual Transistors to Full Chip
Hussam Amrouch (Technical University of Munich, DE)​
BIOSKETCHES
To be added